Senior RTL Design Engineer for AI Accelerator ASIC
sambanovaSan Jose (CA)
Senior RTL Design Engineer for AI Accelerator ASIC
Posted yesterday
sambanovaSan Jose (CA)
SENIORITY
Lead
About the role
SambaNova RTL Design Engineers build blocks of the Reconfigurable Dataflow Unit (RDU) ASICs behind our AI acceleration systems. You’ll own blocks within a larger subsystem, contribute sections of the microarchitecture, write and debug RTL, and carry your blocks through implementation, tape-out, and silicon bring-up.
You’ll work with principal engineers, design verification, and physical design teams, taking on larger blocks as you deepen architectural depth.
Before you apply
Applying takes about a minute. These four things decide how fast it moves after that.
Your profile is current
It's what we read first. Occupations, seniority and locations matter more than a long history.
Two examples you can talk through
Not a portfolio — just two pieces of work where you can explain the decisions and what you'd change.
A number in mind
What you're on now and what would make you move. We negotiate better when we know both.
Your notice period
Employers plan around it, and it's the question that stalls offers most often.
Once you apply, someone reads it and calls you before anything reaches the employer — usually within two working days.