Senior RTL Design Engineer for AI ASICs
etchedaiSan Jose (CA)
Senior RTL Design Engineer for AI ASICs
Posted yesterday
etchedaiSan Jose (CA)
SENIORITY
Lead
About the role
Etched.ai, Inc. in San Jose is seeking an RTL Engineer to ensure AI chip operations are efficient and correct. In this role, you'll develop design verification strategies for existing and upcoming ASIC designs, collaborate with architects, and work in a fast-paced environment. Ideal candidates have at least 5 years in RTL development, experience with high-speed digital logic, and familiarity with verification tools. The position offers competitive benefits and a vibrant workplace focused on engineering skills.
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