Skip to main content

CPU Timing Engineer: Automation & STA Signoff

Posted today

qualcommSanta Clara (CA)

SENIORITY

Lead

Apply (opens in a new tab)

About the role

Qualcomm Technologies, Inc. is seeking a CPU Physical Design Timing Engineer to define, develop and drive CPU timing closure for Oryon CPU Cores. You will collaborate with RTL teams to meet aggressive power, area and performance targets using industry standard tools. You will script and automate STA signoff workflows with TCL/Perl/Python, run PrimeTime/Tempus, and investigate timing miscorrelations across PVT conditions, contributing to multi-project PPA goals and professional growth in a

Before you apply

Applying takes about a minute. These four things decide how fast it moves after that.

Your profile is current

It's what we read first. Occupations, seniority and locations matter more than a long history.

Two examples you can talk through

Not a portfolio — just two pieces of work where you can explain the decisions and what you'd change.

A number in mind

What you're on now and what would make you move. We negotiate better when we know both.

Your notice period

Employers plan around it, and it's the question that stalls offers most often.

Once you apply, someone reads it and calls you before anything reaches the employer — usually within two working days.

More like this