Principal STA Engineer: Timing Signoff Leader
tessolveSan Jose (CA)
Principal STA Engineer: Timing Signoff Leader
Posted 2 days ago
tessolveSan Jose (CA)
SENIORITY
Lead
About the role
Tessolve is seeking a Principal STA Engineer to join our San Jose team to lead timing analysis and signoff for cutting-edge ASIC/SOC designs. You will drive timing closure across multi‑clock/multi‑voltage architectures and collaborate with RTL, Physical Design, DFT, CTS, and CAD teams to enable successful tape-outs at advanced nodes.
The ideal candidate has 10+ years in STA, deep technical leadership, and strong scripting skills.
Before you apply
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