Lead Analog IC Design Engineer - High-Speed SerDes
cadenceSan Jose (CA)
Lead Analog IC Design Engineer - High-Speed SerDes
Posted 2 days ago
cadenceSan Jose (CA)
SENIORITY
Lead
About the role
Cadence seeks a Lead Analog IC Design Engineer in California to drive analog and mixed-signal circuits from concept to final verification, ensuring compliance with customer requirements and industry standards. You will lead CMOS SerDes and high-speed I/O blocks, mentor engineers, and collaborate with cross-functional teams to deliver robust, high-performance designs for cutting-edge applications.
Strong communication, problem-solving, and knowledge of jitter/clocking are essential.
Before you apply
Applying takes about a minute. These four things decide how fast it moves after that.
Your profile is current
It's what we read first. Occupations, seniority and locations matter more than a long history.
Two examples you can talk through
Not a portfolio — just two pieces of work where you can explain the decisions and what you'd change.
A number in mind
What you're on now and what would make you move. We negotiate better when we know both.
Your notice period
Employers plan around it, and it's the question that stalls offers most often.
Once you apply, someone reads it and calls you before anything reaches the employer — usually within two working days.