Senior SIPI Design Engineer: High-Speed SerDes & PDN
microchipSan Jose (CA)
Senior SIPI Design Engineer: High-Speed SerDes & PDN
Posted yesterday
microchipSan Jose (CA)
SENIORITY
Lead
About the role
Microchip Technology Inc. in San Jose, CA is seeking a Senior Technical Staff Engineer - Design (Signal & Power Integrity) to lead SIPI methodologies for high-speed FPGA products, collaborating with global teams to deliver system-level solutions across die, package, and boards. The ideal candidate has 15+ years in SIPI, a BS in EE, strong PDN, Ser Des, and channel modeling experience, and proficiency with HFSS, Siwave, HSPICE, and ADS.
Before you apply
Applying takes about a minute. These four things decide how fast it moves after that.
Your profile is current
It's what we read first. Occupations, seniority and locations matter more than a long history.
Two examples you can talk through
Not a portfolio — just two pieces of work where you can explain the decisions and what you'd change.
A number in mind
What you're on now and what would make you move. We negotiate better when we know both.
Your notice period
Employers plan around it, and it's the question that stalls offers most often.
Once you apply, someone reads it and calls you before anything reaches the employer — usually within two working days.
More like this
