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David Careers

Prinicipal Signal Integrity Engineer

Posted yesterday

advanced micro devicesSan Jose (CA)
Electronics Engineers, Except ComputerResearch and Development in the Physical, Engineering, and Life Sciences

SENIORITY

Lead

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About the role

Signal Integrity Engineer At AMD, we believe technology has the power to solve the world's most important challenges. From advancing healthcare and scientific discovery to powering AI and the technologies people rely on every day, innovation at AMD is shaping the future. Whether you're designing next-gen processors, enabling AI breakthroughs, or bringing leading edge products to market, every role at AMD contributes to something bigger — technology that moves the world forward. Join us and, together, we'll advance your career. As a Signal Integrity Engineer at Adaptive and Embedded Computing Group (AECG), AMD, you will be responsible for ensuring that AMD's next-generation products deliver industry-leading reliability, performance, and efficiency. This role involves analyzing, modeling and validating the complex interconnects of high-speed Serializer/De-serializer (SerDes) channels @56/64/112/128/224+ Gbps, High speed memories like LPDDR4/5x/6, DDR5, PCIe Gen 5/6 etc., and 400/800/1600 Gbps Ethernet links. You will be providing guidelines to board layout teams based on SI and Power simulations and for high-speed structures. In this role, you will closely collaborate with Board HW designers, HW architects, IC packaging team, PCB team, and external partners/suppliers to ensure first time success of the system/board products.
Key Responsibilities:
  • Model and simulate the end-to-end high-speed channels including transceivers, IC package, PCB and cross-boards connectors/cables
  • Utilize industry-standard tools and methodologies to perform a variety of time/frequency domain signal integrity analysis (IBIS-AMI, SPICE, full-wave EM analysis, etc)
  • Identify the link quality such as loss, reflection and crosstalk, and resolve the issues
Conduct channel-simulations to optimize Eye Diagram, Bit Error Rate (BER) and Signal-Noise-Ratio (SNR) for high-speed signaling in a complex system. Interpret the simulation results to provide the design guidelines on board materials, stack-up, transmission line routings, component placement and layout optimization Review PCB layout and board material/stack-up, identify the potential signal integrity and power integrity issues, and propose the solutions Support lab validation and debugging to correlate with the simulation data Collaborate with cross-functional teams to drive product development while keeping projects on schedule and within scope.
Preferred Experience:
  • Strong experience in high-speed signal integrity engineering
  • Proficiency in SI simulation tools (Keysight ADS, Cadence Sigrity, Ansys HFSS)
  • Strong expertise in high-speed architecture, interconnects and PCB/package design
  • Knowledge of high-speed interfaces (PCIe, Ethernet, DDR, etc.)Familiarity with MATLAB or Python for data analysis and automation
  • Hands-on experience with lab testing tools (TDR, VNA, high-speed oscilloscopes)
  • Excellent problem-solving and cross-functional collaboration skills
  • Academic Credentials:
  • Masters or PhD degree in Electrical Engineering, Computer Engineering, or related field
  • This role is not eligible for visa sponsorship.

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