Overview:
In this role you drive power analysis, modeling and optimization for SoC solutions, leading a small team of power engineers through pre- and post-silicon convergence. You will collaborate across architecture, design, verification and product teams to achieve best-in-class power efficiency and performance-per-watt targets. You’ll shape power workflows, improve accuracy and turnaround time, and correlate results to silicon. This position offers the opportunity to influence SoC power strategies within a high-impact, Innovation-driven environment and contribute to Arm’s multi-disciplinary engineering culture.
Responsibilities:
Lead power analysis, modeling and optimization for SoC solutions Direct a small power engineering team through pre- and post-silicon power convergence Collaborate with architecture, design, verification and product teams to meet power targets Develop accurate project plans involving multiple teams and ensure on-time delivery Define workflows to improve accuracy, turnaround time, and silicon correlation Promote innovation and mentor junior engineers Present technical content to internal and external stakeholders
Key requirements:
Strong technical leadership with ability to develop accurate project plans involving multiple teams Expertise in RTL and Netlist based power analysis and sign-off flows, EDA tools, and latest SoC physical design and simulation/emulation Knowledge of ASIC design dependencies on power efficiency including technology node, mixed VT design, standard cell and memory library selection, voltage and power domain partitioning Experience driving multiple projects and mentoring junior engineers Verification experience creating workload scenarios in simulation and emulation environments (e.g. VCS, Questasim, Incisive, Veloce Strato, Palladium, Zebu) Excellent presentation, interpersonal and communication skills presentation interpersonal communication mentoring RTL power analysis Netlist power analysis sign-off flows