Senior DFT Logic Design Engineer — Hybrid ASIC Lead
intelPhoenix (AZ)
Senior DFT Logic Design Engineer — Hybrid ASIC Lead
Posted 2 days ago
intelPhoenix (AZ)
SENIORITY
Lead
About the role
Intel Foundry is seeking a Senior DFT Logic Design Engineer to support Aerospace/Defense/Gov customers, focusing on DFT/DFM insertion, ATPG validation, and flow development. You will collaborate with customers, IP providers, and EDA vendors to resolve issues and provide technical training.
The role requires a Bachelor's in a STEM field, 3+ years in CMOS processes, and scripting skills, with a hybrid work model in the United States. U.S. government security clearance is preferred.
Before you apply
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A number in mind
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Your notice period
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Once you apply, someone reads it and calls you before anything reaches the employer — usually within two working days.
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