Principal Memory Architect, SoC IP & Power-Efficient Design

Posted today

careersusmaxlinearCarlsbad (CA)

SENIORITY

Lead

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About the role

MaxLinear is seeking a Principal Engineer Memory Architect in Carlsbad, CA to drive memory IP design and optimization for SoC integration. You will lead architecture choices, evaluate memory IP roadmaps, and work across teams to ensure high performance, low power, and robust memory solutions. The role requires deep SRAM/register-file expertise, memory compiler/verification experience, and strong collaboration with IP and SoC engineers.

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