Senior Physical Design Engineer: End-to-End ASIC/FPGA
roguebeamSeattle (WA)
Senior Physical Design Engineer: End-to-End ASIC/FPGA
Posted 2 days ago
roguebeamSeattle (WA)
SENIORITY
Lead
About the role
Roguebeam is seeking a Senior Physical Design Engineer to own block- and chip-level implementation from netlist to GDS, with FPGA P&R support, for phased-array solutions. You will floorplan, place, clock, route, and sign off silicon that carries digital beamforming and adaptive processing.
You will collaborate end-to-end on timing, CTS, and verification, integrating memories, high-speed interfaces, and DFT structures.
Before you apply
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Your profile is current
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Two examples you can talk through
Not a portfolio — just two pieces of work where you can explain the decisions and what you'd change.
A number in mind
What you're on now and what would make you move. We negotiate better when we know both.
Your notice period
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Once you apply, someone reads it and calls you before anything reaches the employer — usually within two working days.
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