Staff Physical Design Engineer, HBM
Staff Physical Design Engineer, HBM
Posted 42 days ago
SENIORITY
Manager
About the role
- Own and execute physical design implementation from synthesized netlist through GDSII, including floorplanning, placement, clock tree synthesis, routing, and physical signoff
- Utilize AI-Enabled tools in the Netlist to GDS flow
- Perform and drive timing closure across multiple modes, corners, and scenarios using industry‐standard STA tools
- Analyze and resolve congestion, timing, IR drop, EM, and power integrity issues
- Develop and refine floorplans, power grids, and clocking strategies for high‐performance designs
- Work with placement and timing closure of custom analog hard IP macros in a digital-on-top design flow
- Collaborate closely with RTL designers to influence partitioning, constraints, and micro‐architecture decisions early in the design cycle
- Implement and validate low‐power design techniques, including multiple/isolated power domains, power gating, and UPF/CPF‐based power intent
- Execute physical verification (DRC/LVS/ANT/DFM) and support signoff flows
- Drive functional and timing ECOs as needed to meet design targets
- Use scripting and automation (TCL, Python, etc.) to improve productivity, quality, and flow robustness
- Strong understanding of the RTL‐to‐GDSII physical design flow particularly floorplanning, place & route, clock distribution, and timing analysis and closure using standard EDA tools and advanced process technologies
- Experience with full‐chip integration, partitioning, and budgeting
- Solid understanding of power, performance, and area tradeoffs
- Knowledge of low‐power architectures, including DVFS, power gating, and multi‐voltage designs
- Proficiency in scripting/programming (TCL, Python, Perl, Shell scripting)
- Strong problem‐solving skills and ability to debug complex physical design issues
- Effective communication skills and ability to work in a cross‐functional team environment
- Experience in validating Power Distribution Network (PDN), IR/EM
- Experience with advanced technology nodes
- Experience with high‐frequency, high‐density designs and complex clocking schemes
- Familiarity with memory, HBM, or datapath‐intensive designs
- Understanding of device physics and process‐technology impacts
- Experience in the 3D-IC technology, methodology, and advanced packaging and thermal considerations
- Bachelor's degree in EE with good understanding of computer architecture and 7+ years experience in related field
- Desired: Master's degree in EE / CE with 5+ years experience in related field
- As a world leader in the semiconductor industry, Micron is dedicated to your personal wellbeing and professional growth. Micron benefits are designed to help you stay well, provide peace of mind and help you prepare for the future.
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