Digital IC Design Engineer

Science is a clinical stage, vertically integrated technology company focused on solving some of neuroscience's hardest questions and most serious unmet medical needs. We work to restore quality of life to those with debilitating conditions for which there are no treatment options, creating devices aimed at restoring vision, cognition, and mobility to patients who have lost it. To support progress across our industry, we provide state-of-the-art components and vertically integrated infrastructure for others to build on via Science Foundry. We are developing a novel optical interconnect for interfacing with the brain and seeking an experienced lead digital IC designer to take a leading role in developing digital IPs and digital ASICs in our custom ICs. In close collaboration with our micro-fabrication group, electrical engineers, and software developers, you'll design digital IPs and chips used in our custom photonic components. Solid understanding of digital IC design at CMOS circuit level is a must Know-how in standard-cell based digital IC design is required Fluency in Verilog / System Verilog, and Real-Number based modeling and verification is a must 5+ years of experience in RTL based digital design capture and verification Sound understanding of closing the digital design in terms of area, power, and timing is required. Familiarity with high-speed digital interfaces using PLLs, DLLs, Serializers is a plus Successful track record of providing digital IPs in fabricated silicon products is required Experience with RTL-to-GDS digital design implementation using industry standard tools is required Familiarity with open source digital IC design flows and open PDKs is a plus Good command on scripting languages (e.g. Python, TCL, Perl) for design and testing is required Evidence of exceptional ability as a lead digital IC designer BS in Electrical Engineering Preferred qualifications: Familiarity with embedded digital system design is a plus Experience with the RISC-V architecture, design and implementation Familiarity with FPGA programming for chip testing and IP verification / emulation Experience in digital design for medical applications for safety MSc, PhD or equivalent professional experience in digital IC design and methodologies For individuals hired to work in California, Science is required by law to include a reasonable estimate of the compensation range for this role. We determine your level based on your interview performance and make an offer based on geo-located salary bands. The base salary range for this full-time position is $150,000-$220,000 + equity + benefits. Within the range, individual pay is determined by work location and additional factors, including job-related skills, experience, and relevant education or training. Please keep in mind that the equity portion of the offer is not included in these numbers. At Science, our benefits are in place to support the whole you: Competitive salary and equity Medical, dental, vision and life insurance Flexible vacation and company-paid holidays Healthy meals and snacks provided for non-remote employees Paid parental, jury duty, bereavement, family care and medical leave Dependent Care Flexible Spending Account, subsidized by Science Flexible Spending Account 401(k) Science Corporation is an equal opportunity employer. We strive to create a supportive and inclusive workplace where contributions are valued and celebrated, and our employees thrive by being themselves and are inspired to do their best work. We seek applicants of all backgrounds and identities, across race, color, ethnicity, national origin or ancestry, citizenship, religion, sex, sexual orientation, gender identity or expression, veteran status, marital status, pregnancy or parental status, or disability. Applicants will not be discriminated against based on these or other protected categories or social identities. Science will also consider for employment qualified applicants with criminal histories in a manner consistent with applicable federal, state and local laws.