Senior Digital Design Engineer
Senior Digital Design Engineer
Posted 51 days ago
SENIORITY
Lead
About the role
- Review IP architecture specifications, features and programming model, microarchitecture and interface specifications.
- Plan IP documentation and design, including providing schedule assessments.
- Design IP meeting requirements for quality and performance, using Verilog and System Verilog RTL, and vendor and internal checking tools.
- Collaborate with verification team to develop test plans and complete verification execution to 100% coverage, and as per NXP standard quality and maturity standards.
- Deliver completed IP, including RTL design and supporting documentation
- Track metrics during IP development, include development plan milestones, code and functional coverage, defect tickets, and tracing of requirements versus design specification.
- Collaborate with cross-functional teams to provide expert support to subsystem, SoC, validation, and applications engineering teams during product development.
- Key challenges: Proving design meets all requirements and ensuring zero defects escape to silicon.
- Meeting committed schedules without compromising quality
- Cross-functional aspects: Definition reviews with architecture teams and designers
- Planning with verification team, architecture team, and project manager
- Minimum BSEE/BSCE/BSCSMinimum 4 years of experience in IP or SoC design
- Knowledge of SoC architecture required
- Expert knowledge of Verilog required
- Experience with design quality checks, including Lint, clock domain crossing (CDC) analysis, static timing analysis (STA)
- Expert knowledge of ARM AMBA bus protocol standards desired
- Knowledge of functional safety, including ISO26262 a plusKnowledge of CPU or cache architecture a plusKnowledge of C coding a plusKnowledge of scripting, such as Perl or Python, a plus
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