Lead, Package Tech & SI/PI for AI Chip Design
aidachipMillbrae (CA)
Lead, Package Tech & SI/PI for AI Chip Design
Posted yesterday
aidachipMillbrae (CA)
SENIORITY
Lead
About the role
AIDAChip Inc. in the SF Bay Area is seeking a Package Technology, Signal & Power Integrity Lead to own the cross‑disciplinary packaging and interface stack, and to decide what 'correct' means for each AI teammate before tapeout.
You will shape the die‑to‑package‑to‑board handoffs, set measurable criteria, and drive customer-ready methodology with forward‑deployed engineers. This role rewards hands‑on depth, system‑level thinking, and clear specification of behaviors for complex chip packages in
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