Digital Design Engineer
sql pagerSan Jose (CA)
About the role
Job Title
Job Description:
- Define block level micro-architecture and write design specificationRTL implementation of the specification while meeting power, area, timing constraints
- Work with Verification team to verify functionality
- Work with Backend team to go through ASIC flow to tape-out success
- Work with Firmware teams to develop APIs and help silicon bring upPost-silicon validation and debug
Minimal Qualifications:
- Master's degree in Electrical Engineering or related field 3 years of industrial experience in ASIC Design
- Experience in micro-architecture and RTL design of complicated blocks
- Proficient in RTL design using HDLFamiliar with design and verification tools (VCS, Verdi, DC, etc.)Hands on experience of ASIC design flow including RTL design, verification, Lint, CDC, LEC, logic synthesis, DFT, timing analysis, floor-planning, GLS, ECO, bring-up & lab debug
- Proficient scripting language in one of: Python, TCL, Shell, PerlSelf-motivated team worker
Preferred Qualifications:
- Hands on design experience in PCIe logical / link / transaction layers.
- Knowledge of PCIe / CXL Protocol Stacks, especially latest Generations
- Experiences in SerDes architectures
- Experiences in Digital Signal Processing
- Good debugging and problem-solving skills
Before you apply
Applying takes about a minute. These four things decide how fast it moves after that.
Your profile is current
It's what we read first. Occupations, seniority and locations matter more than a long history.
Two examples you can talk through
Not a portfolio — just two pieces of work where you can explain the decisions and what you'd change.
A number in mind
What you're on now and what would make you move. We negotiate better when we know both.
Your notice period
Employers plan around it, and it's the question that stalls offers most often.
Once you apply, someone reads it and calls you before anything reaches the employer — usually within two working days.