Senior ASIC Design Engineer: Front-End & DFT
advanced micro devicesSan Jose (CA)
Senior ASIC Design Engineer: Front-End & DFT
Posted today
advanced micro devicesSan Jose (CA)
SENIORITY
Lead
About the role
AMD in San Jose, CA, is seeking a candidate to join the front-end design/integration team to deliver high-quality silicon and achieve first-pass silicon success. You will implement and verify DFT architectures and features, including scan insertion and ATPG pattern generation. The ideal candidate will have strong communication and problem-solving skills, experience with DFT methodologies, and proficiency in Verilog RTL, scripting, and EDA tools.
Before you apply
Applying takes about a minute. These four things decide how fast it moves after that.
Your profile is current
It's what we read first. Occupations, seniority and locations matter more than a long history.
Two examples you can talk through
Not a portfolio — just two pieces of work where you can explain the decisions and what you'd change.
A number in mind
What you're on now and what would make you move. We negotiate better when we know both.
Your notice period
Employers plan around it, and it's the question that stalls offers most often.
Once you apply, someone reads it and calls you before anything reaches the employer — usually within two working days.