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Silicon Prototype Engineer – SoC Emulation & Verilog Debug

Posted yesterday

appleCupertino (CA)

SENIORITY

Lead

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About the role

APPLE INC in Cupertino, California is seeking a hardware emulation engineer to design and emulate SoC models. You will write Verilog RTL, C/C++ DPI transactors, SV assertions, and develop new flows for emulation model builds. You will collaborate with CAD, design verification, Silicon validation, DFT and SW teams to optimize performance and resource usage. 40 hours/week with a base pay range that reflects experience and location.

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