Senior ASIC RTL Engineer — DFT & Verification Lead
cisco systemsSan Jose (CA)
Senior ASIC RTL Engineer — DFT & Verification Lead
Posted yesterday
cisco systemsSan Jose (CA)
SENIORITY
Lead
About the role
Cisco Systems, Inc. is seeking a senior RTL/Silicon design engineer focused on Design for Test (DFT) RTL. You will collaborate with front-end RTL and backend physical design teams to ensure robust silicon architectures for Cisco's Silicon One family. You will drive high-quality DFT RTL across chip architecture, working to meet performance and innovation standards while integrating with Verilog/System Verilog design flows and AMBA interfaces.
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