Director, Next-Gen Memory Subsystem Architecture
sk hynix americaSan Jose (CA)
Director, Next-Gen Memory Subsystem Architecture
Posted today
sk hynix americaSan Jose (CA)
SENIORITY
Manager
About the role
SK hynix America seeks a Director of Buffer & Memory Subsystem Architecture to lead HW/SW co-design for next-generation HBF-xPU systems in San Jose, CA. You will translate AI workload traces into architectural policies for caching, prefetching, and data movement, with a focus on memory controllers and performance modeling.
You will own architecture decisions, interface contracts, and system-level efficiency across hardware and software, driving latency and bandwidth improvements.
Before you apply
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Two examples you can talk through
Not a portfolio — just two pieces of work where you can explain the decisions and what you'd change.
A number in mind
What you're on now and what would make you move. We negotiate better when we know both.
Your notice period
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