Senior Post-Silicon PCIe Characterization Engineer
$161,500-$218,500 per year
Apply (opens in a new tab)Senior Post-Silicon PCIe Characterization Engineer
Posted 45 days ago
SENIORITY
Lead
SALARY
$161,500-$218,500 per year
About the role
- Develop and enable system-level stress workloads on Linux and Bare-Metal SW environments!
- Collaborate with post-silicon validation team to leverage test content to characterize silicon at the system level.
- Debug and resolve system issues and bugs
- Develop test plans and implement tests for characterizing silicon at the system level.
- We are looking for experience in pre- or post-silicon validation and characterization, with an understanding of silicon power, performance, and PVT behavior.
- Experience with PCIe architecture, including link initialization, training, equalization, and PHY operation.
- Software skills including C/C++, Arm assembly, Python, or scripting languages
- Experience with voltage/frequency margining and silicon operating limits
- Experience debugging PCIe, silicon, and system issues using protocol analyzers, scopes, debuggers, or similar tools
- Ability to analyze data, tackle sophisticated problems, and communicate technical findings"
- Experience with PCIe PHY characterization, link behavior, signal integrity, and protocol-level debug is helpful, including experience with PCIe Gen4, Gen5, Gen6, or related high-speed interfaces.
- Experience characterizing PCIe performance, stability, operating margins, and failure behavior
- Experience with PCIe protocol analysis, error handling, link recovery, or compliance testing
- Experience developing Python automation for characterization and data analysis
- Experience with Arm-based SoCs, CPUs, PCIe controllers, or high-speed interfaces
- Understanding of system-level testing and correlation with manufacturing test
- You will succeed in this role by collaborating effectively, continuing to learn, and applying strong analytical and interpersonal skills to sophisticated silicon and PCIe challenges!
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