Senior Memory Architect: High-Speed, Low-Power RAM Design
lattice semiconductorSan Jose (CA)
Senior Memory Architect: High-Speed, Low-Power RAM Design
Posted today
lattice semiconductorSan Jose (CA)
SENIORITY
Lead
About the role
Lattice Semiconductor, with a major presence in San Jose, California, seeks a Sr. Memory Designer to lead the design of high-speed, low-power memory blocks for FPGA architectures.
You will own memory architecture, verification, and integration across the full design flow, collaborating with architecture and design teams to meet performance and yield targets. You will contribute to next-generation memory solutions, drive optimization, and ensure robust design practices while working in a
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