Senior ASIC Design Engineer

Key Responsibilities: Configure and integrate Arm processor IP (e.g., Cortex-M series) and associated subsystem components including bus interconnects, memory controllers, and peripheral IPDefine and implement subsystem-level RTL integration, ensuring correct connectivity, clocking, and reset architecture across all subsystem components Collaborate with SoC architects to translate subsystem requirements into a coherent RTL implementation Work closely with the verification team to define and develop comprehensive test plans covering subsystem functionality, processor interfaces, and IP integration Author and review design specifications and integration guides for the processor subsystem Identify and resolve integration issues across IP boundaries, including protocol, clocking, and reset domain crossings Support synthesis and timing closure for the processor subsystem in coordination with the physical design team Participate in design reviews and contribute to continuous improvement of design and integration methodologies Support bring-up and debug activities for the processor subsystem on post-silicon hardware

This is a full-time, exempt position based out of our Saratoga office. The target base pay for this position is $150,000 - $220,000 annually. The total compensation packaged will be determined by various factors such as your relevant job-related knowledge, skills, and experience. E-Space is not currently able to provide employment sponsorship for candidates who do not hold work authorization for the location of this role.