Staff Signal Integrity Engineer We are seeking an expert Staff Signal Integrity Engineer to drive signal integrity (SI) design, simulation, optimization, and validation for next-generation AI Superchip and data center computing platforms. This role focuses on high-speed interconnects across silicon, sophisticated packaging, and system platforms, ensuring robust electrical performance, design efficiency, and reliable high-speed signaling!
Location: We are open to hiring in either Chandler, AZ or San Jose, CA.
Responsibilities:
Drive SI design, modeling, simulation, and validation across SoC, advanced 2.5D/3D packaging, PCB, and system-level interconnects!
Perform high-speed channel analysis and optimization for DDR5/LPDDR, PCIe/CXL, Ethernet, die-to-die (D2D), and next-generation SerDes interfaces.
Develop and validate electromagnetic (EM), S-parameter, IBIS/IBIS-AMI, and behavioral models for chip-to-chip and chip-to-memory interfaces.
Lead signal integrity optimization, including insertion loss, return loss, crosstalk, impedance discontinuities, equalization, and BER-based eye-margin analysis.
Collaborate with silicon PHY, package, PCB, architecture, and validation teams to drive SI design guidelines, simulation-to-silicon correlation, and electrical sign-off.
Support advanced packaging technologies, including chiplets, interposers, high-density substrates, and heterogeneous integration.
Required
Skills and Experience:
BS/MS/Ph.D. in Electrical Engineering or a related field.8+ years of experience in high-speed signal integrity engineering, semiconductor packaging, or system-level electrical design.
Strong expertise in SI simulation and 3D electromagnetic modeling tools such as Ansys HFSS, SIwave, Keysight ADS, or equivalent.
Solid understanding of high-speed I/O signaling, transmission lines, S-parameters, crosstalk, equalization, and timing/BER analysis.
Experience with advanced packaging, DDR/LPDDR memory interfaces, PCIe/CXL, and high-speed SerDes technologies. Strong analytical, problem-solving, and multi-functional teamwork skills."
Nice To Have: "
Skills and Experience:
Experience with AI/HPC supercomputing platforms, advanced chiplet integration, package-to-board co-design, silicon bring-up, and simulation-to-measurement correlation.
Salary Range: $198,100-$268,000 per year
We value people as individuals and our dedication is to reward people competitively and equitably for the work they do and the skills and experience they bring to Arm. Salary is only one component of Arm's offering. The total reward package will be shared with candidates during the recruitment and selection process.
