Skip to main content

Senior ASIC Physical Verification Engineer

Posted yesterday

annapurna labsSan Diego (CA)

SENIORITY

Lead

Apply (opens in a new tab)

About the role

Annapurna Labs (U.S.) Inc. is seeking an ASIC Physical Design Integration and Verification Engineer to drive full-chip floorplanning, integration, and physical verification. You will use Calibre, IC Validator, and PVS to ensure manufacturability and sign-off across advanced nodes, collaborating with layout and design teams and mentoring junior engineers. The role emphasizes strong problem-solving, industry-standard tool mastery, and a proactive approach to improving cloud-scale silicon in AWS

Before you apply

Applying takes about a minute. These four things decide how fast it moves after that.

Your profile is current

It's what we read first. Occupations, seniority and locations matter more than a long history.

Two examples you can talk through

Not a portfolio — just two pieces of work where you can explain the decisions and what you'd change.

A number in mind

What you're on now and what would make you move. We negotiate better when we know both.

Your notice period

Employers plan around it, and it's the question that stalls offers most often.

Once you apply, someone reads it and calls you before anything reaches the employer — usually within two working days.

More like this