Senior Physical Design Engineer for High-Performance ASICs

Posted 2 days ago

tachyumLas Vegas (NV)

SENIORITY

Lead

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About the role

Tachyum in Las Vegas seeks a senior IC design engineer to drive ultra-high performance, low-power data-processing chips. You will work with RTL teams to meet aggressive PPA targets and contribute to floorplanning, timing closure, and clock-tree design. The role requires 5+ years in semiconductor design, Verilog expertise, and experience with Innovus. Strong collaboration skills and willingness to mentor junior engineers are essential.

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