Senior Photonics IC Layout & Tape-out Lead
acceler8 talentBerkeley (CA)
Senior Photonics IC Layout & Tape-out Lead
Posted 2 days ago
acceler8 talentBerkeley (CA)
SENIORITY
Lead
About the role
Acceler8 Talent is seeking a senior Photonic IC Layout & Design Flow Engineer to own the PIC layout, verification, signoff and tape-out, connecting photonic designs with electronic IC development, packaging and silicon validation. You will establish and drive a Cadence Photonics workflow for GlobalFoundries' 45 nm process, coordinate component designers, and ensure a complete, manufacturable PIC delivery from layout through tape-out.
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