Overview:
In this role you will verify Velaura’s AI acceleration units and ensure correct, efficient hardware and software integration. You’ll collaborate with architects, RTL, software, and system teams to validate numerical and protocol correctness across blocks and full workloads. You will build portable verification environments and reference models for GEMM/GEMV, and assess performance, power, and stability under real-world workloads. This is a chance to shape next-generation AI compute hardware with a strong, cross-functional impact. Compensation / Benefits base salary plus equity comprehensive medical, dental, vision paid time off flexible work arrangements professional development opportunities well-being and growth focus
Responsibilities:
Own verification of custom AI acceleration units (matrix and vector compute engines) Translate architecture intent into test and coverage plans with correctness criteria Build verification environments using SystemVerilog, UVM, C, C++ with portable stimulus and coverage Develop reference models for GEMM and GEMV and compare against hardware results Verify data flow, precision, rounding, and quantization per the architecture Assess throughput, latency, utilization, and performance per watt under AI workloads Execute regressions and track bug/coverage metrics; support emulation and pre-silicon bring-up
Key requirements:
8+ years in verification of high-performance compute or complex digital designs Strong understanding of LLMs and inference data flow Knowledge of GEMM and GEMV mappings to hardware Proficiency with SystemVerilog, UVM, C, C++, assertions, and coverage-driven verification Experience building or using reference models in C, C++ or Python Understanding of numerical formats and precision tradeoffs (FP16, BF16, FP8, INT8) Experience owning a block from test plan to coverage closure and debugging complex failures BS or higher in Computer Engineering, Electrical Engineering or Computer Science Independent ownership and initiative Strong debugging and problem-solving Collaborative with cross-functional teams SystemVerilog UVM C