SI/PI Lead for ASIC Packaging
ciscoSan Jose (CA)
About the role
Cisco Silicon One is seeking a Signal and Power Integrity Technical Leader in San Jose to drive ASIC packaging, SI/PI analysis, and high-speed interconnect design. You will lead a team to define rules, verify designs, and collaborate with layout and system partners to achieve optimal performance and reliability.
The role requires extensive lab work, ASIC tape-out experience, and expertise in PAM4, SerDes, and 2.5D packaging.
Before you apply
Applying takes about a minute. These four things decide how fast it moves after that.
Your profile is current
It's what we read first. Occupations, seniority and locations matter more than a long history.
Two examples you can talk through
Not a portfolio — just two pieces of work where you can explain the decisions and what you'd change.
A number in mind
What you're on now and what would make you move. We negotiate better when we know both.
Your notice period
Employers plan around it, and it's the question that stalls offers most often.
Once you apply, someone reads it and calls you before anything reaches the employer — usually within two working days.
More like this