ASIC/FPGA SoC Design Engineer (Space/Comm)
starlinkPalo Alto (CA)
ASIC/FPGA SoC Design Engineer (Space/Comm)
Posted 3 days ago
starlinkPalo Alto (CA)
SENIORITY
Lead
About the role
SpaceX is seeking an ASIC Design Engineer (Silicon Engineering) in California to design ASICs and FPGAs for Starlink, developing next-generation chips for space and ground infrastructures.
You will work with cross-disciplinary teams, implement complex SoC blocks in Verilog/SystemVerilog, optimize for power and area, and contribute to a full design lifecycle with strong lab bring-up and validation, and collaboration with software teams.
Before you apply
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Your profile is current
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A number in mind
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Your notice period
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Once you apply, someone reads it and calls you before anything reaches the employer — usually within two working days.